High Frequency Clock Divider Board

Product Overview


clkdividerThe ASP-CLK-00 Clock Divider is designed to divide high frequency signals, up to 2.5GHz, from 4 to 256 times. It will accept single ended (Unbalanced) or differential (Balanced) signals with amplitudes as little as 100mV rms. The clock division is controlled by 4 shunt jumpers. The circuit can be disabled and the divide by counter reset with 2 control signals. The on board regulator will accept voltages from 4.85 to 15.0V. The output is capable of driving 700mV Peak to Peak into 50 Ohms.

Hardware Specifications

  • Model part number: ASP-CLK-00 rev A
  • Input frequency: 10 MHz – 2.5 GHz
  • Input impedance: 50 Ohm
  • Input Voltage: 100mv RMS (280mv PK – PK) to 1.16v RMS (3.3v PK – PK)
  • Output Impedance: 50 Ohm
  • Output Voltage: 700mv PK–PK (Into 50 OHMS) or 1.4v PK-PK (Into IM)
  • Power supply voltage: 4.85 – 15.0 V
  • Power supply current: 110 mA
  • Clock divider divisions: ÷4, ÷8, ÷16, ÷32, ÷64, ÷128, ÷256
  • Physical dimension: 2” x 1.6” (5.08 cm x 4.06 cm)

Download the manual here.

The mechnical drawing(DXF)

Unit Price: $325

“Wow, that works NICE!  Did not even use a disconnect relay for a 100MHz differential oscillator. 
Well done.”
     – Matt Turpin, Sr. Test Engineer, Datest Corporation